Posts by SWL-AndreiGeorgian


    I have an Analog Devices Pluto SDR, revision C.

    I've made a debug and, modifying the dmac FPGA core, I was able to see that there are some samples lost between chunks of data received from FPGA.

    More specifically, I've added a counter when there is an active sample, but the fifo is full. I've read this counter on AXI Lite in axi_dmac Linux driver whenever a new interrupt occurs.

    The counter was proportionally greater with the sample rate used for SDR: from 1MHz to 20Mh for example.

    I've seen that the driver receives just a buffer descriptor at once. It informs the FPGA IP core to transfer a chunk of data, then it waits for the interrupt and after that it writes another descriptor to FPGA and so on. Between the FPGA arming with a new buffer descriptor there is a gap that leads to samples lost.

    The dmac FPGA core is capable of receiving 4 buffer descriptors and when it finishes one, it will immediately start the next one. The iio library (I suppose) could just push to the dma driver at least 2 buffer descriptors at starting point so that no samples will be lost.

    Do you have a fix for this? Or can you tell me in what library or driver I could find the bound between userspace and dma Linux driver? Then I will be able to modify myself in order to send two buffer descriptor at the begining.

    Thank you,

    Andrei Georgian