Posts by PA3FYM

  • Octagon Oslo PLL LNB with external Reference

    DL5MGD I connected the junkbox GPSDO to the transverter. Tuning to Es'hail-1 11199.8H beacon the tone sounds a bit 'wobbly' (the jitter is around 4 ticks per second) but I am not unsatisfied with the result. I think that redimensioning of the loopfilter may give hope. After all .. it's a cheap GPS module, not made for generating a stable reference (like the M8-LEA (iirc). Overall feeling: I am satisfied with this nice combination of junkbox parts!

  • Octagon Oslo PLL LNB with external Reference

    DL5MGD Unfortunately there is no (hardware) lock detect (like e.g. in the 4046) and/or in the more sophisticated PLL's like ADF's.


    As an idea I tried to determine if the stability of the VCO-voltage could be an alternative indicator of a lock. I don't use an Arduino (ATMega328p) but a nice and small 'tuned' opamp, aka ATTiny13. So I had to code the RS232 routines etc (because flash is only 1024 bytes).


    Below my first trail. My phase detector is max 4V out, so ADC resolution is 3.9 mV.

    Measuring the VCO-voltage with my multimeter, it remains stable within +/- 10 mV
    (I can't measure it more accurately) when a lock is achieved. So, my reasoning was that 3*3.9 mV (= ~12 mV) could be a nice figure of merit whether the VTCXO is in lock.


    The first trial seems promising. While starting up the LED doesn't burn. When a lock is achieved the LED burns, and goes on and off for a while. After a few minutes it keeps burning. Maybe an idea for you to try or refine it?


    Code below:


    Edit: for those interested, compete code is here (rename to .ino) gpsdo-ublox-1MHz-ref.ino.txt

  • Es'hail-2 / P4-A / QO-100 / Teleport Inauguration Day

    Quote from g7iii

    Read, understood, and will standby on the 14th :) Valentines day! Enjoy the better weather :)

    Eh .. rumours are that Germans fear February 14th because it's either the birthday or the anniversary of Judas (it's not figured out precisely), the betrayer of Jesus. So they prefer to stay inside ... because Feb 14th brings bad luck. Hopefully this does not relate to Qatar!

  • Octagon Oslo PLL LNB with external Reference

    Certainly a good point, when I program PLL's I put my PICs (or Atmels) asleep.

    Only tested it with ADF-PLL's, so perhaps DL5MGD can try it with his contraption?


    Code
    set_sleep_mode(SLEEP_MODE_PWR_DOWN);  // select PWR DOWN mode
sleep_enable();                       // set sleep bit in MCUCR
sleep_mode();                         // put the CPU asleep

  • Octagon Oslo PLL LNB with external Reference

    DL5MGD Yep, it's awful but I read people use it (with some filtering?). My first idea was to generate the 27 MHz reference with the 'ProgRock' but the signal gave me goosebumps (Gaensehaut) ; -)


    Concerning the loopfilter. I didn't knew/found that K9IVB publication. Thanks for the hint!


    His 2nd order loopfilter seems a little different than the 'normal' 2nd order filters.

    I just did some simulations with the 2nd order loopfilter from ADISimPLL. Needs some experimenting though. First build the 'junkbox GPSDO' in a casing and then refine it.

  • Octagon Oslo PLL LNB with external Reference

    Heiner, it is not wise to let it generate 10 MHz because these Ublox modules have NCO's (numerical controlled oscillators) inside. The master clock inside the unit runs at 48 MHz. 48/10 = not an integer, so inherently there will be very much jitter.


    It is better to use an integer fractional value (google on it and see Ublox-7 Receiver Description document or previous posts in this thread ; -).


    Additionally, the (10 MHz or whatever) signal quality is useless as reference.

    However, I can be used in a 'clock recovery' circuit (like also mentioned in the Ublox-7 receiver description document). And that is exactly we did: take another (short term stable) oscillator and make this long term stable with a PLL, using a 'dirty' reference. Google on it, there are several publications on this topic.
    So nothing new here ; -)


    Last but not least: my recommendation would be to remove the LED from the PPS output. It generates harmonics at higher frequencies.

  • Octagon Oslo PLL LNB with external Reference

    DL5MGD : Yesterday I found a Philips 10 MHz TCXO in the junkbox and made a PLL with other junkbox material. I use a 4017 to divide the 10 MHz and (of course) a LS86 as phase comparator. I've a Ublox NEO-7M which is programmed for 1 MHz Ref-out with an ATTiny13a.


    Having the philosophy 'better smartly stolen than badly (re)invented' and (after measuring) finding out that the k of my TCXO was almost 5 Hz/V too, I used your PLL loopfilter values.


    The PLL locked immediately. However, on the oscilloscope I still see the jitter of the Ublox on the VCO-voltage. As a try I increased the 100 nF capacitor to 22 uF. The result is that (of course) the PLL takes longer time to lock (it seems to oscillate but damps out in time) and afterwards the Ublox jitter was unvisible here.


    Now have to test it in conjunction with my transverter and listen to the audio quality (phase noise) of the whole RX-chain (and compare it with my existing GPSDO).