Octagon Oslo PLL LNB with external Reference

  • Could be ... but it only removes the jitter. When you've a good 25 MHz source it's not necessary.


    Perhaps the 10 MHz version is good enough to remove the jitter from a Ublox when the Ublox is generating 10 MHz ? If that is the case then a GPSDO is not necessary and a simple Ublox NEO-7 (or similar) may be used (?) . Experiments have to proof this

  • A while ago there was some discussion about the si5351a device. I have just managed to find a link to some work done by Daniel Estevez EA4GPZ. He found the output from this device to be quite clean. Take a look: https://destevez.net/2016/07/p…ences-for-a-ku-band-lnbf/ As I said earlier, it is important to put the driving micro to sleep after a frequency command has been sent to the si5351a. I hope this is of use. 73 Russ.

  • G4SAQ Hi Russ, saw that posting before. Despite the results being presented there, I thought about putting the uP asleep. Altough I do this too, mainly for power consumption reasons and after programming PLL's the uP (depending non the application) has nothing else to do, I can't find a reason why it inflicts with the phase noise of the Si5351. If you program once and let the uP in an infinite loop, not addressing the IO-lines of the Si5351, why does this has influence?


    Besides that you've found 'that putting the uP asleep works' (and I believe you) , I'd like to know why it works.

  • PA3FYM I don't have a definitive answer to that. However, i suspect that the noise comes from the micro's clock and that that a tiny amount of this gets onto the I2C connection. Putting the micro to sleep turns the clock off. I hope to modify my quad Octagon (25MHz) tomorrow. Then I will inject it with the si5351a output and see what the NB transponder beacon looks like on my SDR. 73 Russ

  • Inside the LNB there is also a PLL and VCO as well as phase detector and loop filter (implemented in the PLL chip). Have someone actually checked the loopfilter and vco design of this internal PLL? I am wondering if this internal PLL / VCO combination may be causing the wobble we sometimes can hear on the beacon even with what should be quite stable reference? Is the loopfilter or other aspects of this loop modifiable?


    Have someone verified carefully that the LNB will be so stable listening on the CW beacon with an external OCXO or GPS locked OCXO

    ...that no wobble at all will be noticeable on the CW beacon?


    (After all we are locking a PLL to another PLL .... when we do this mod)


    (Just an idea)


    73

  • DL5MGD thanks for info about using Si5351. I see you replaced the default 25 MHz crystal oscillator, with a 10 MHz oscillator. Then I would assume the out frequency becomes too low is you dont tweak the settings.


    What settings did you do in software to be able to set the correct frequeny via SPI to the Si5351? I see you use the Etherkit/Si5151 library.


    Good morning,

    I am using here an Octagon Oslo Optima LNB and a sdr usb stick. As reference frequency source for both devices i made a small circuit from parts lying around which delivers 25MHz for the lnb and 28.8MHz for the sdr stick disciplined via gps. The arduino sketch is programmed in a very direct stile.....not very nice, but working. The sketch needs two libraries: https://github.com/mikalhart/TinyGPSPlus and https://github.com/etherkit/Si5351Arduino


    vy73

    DL5MGD

  • @Mike5000 Hi, you can simply define a new reference frequency for the si5351 by using the etherkit library.


    unsigned long long pll_freq_clk0 = 80000000000ULL; //internal vco si5351, best if even multiple from freq_clk0

    unsigned long long freq_clk0 = 2500000000ULL; //desired output frequency

    unsigned long SI5351_CLK0 = 10000000; //reference frequency si5351

    si5351.set_freq_manual(freq_clk0, pll_freq_clk0, SI5351_CLK0);


    But in my case the output is not clean enough. So i replaced the si5351 with the circuit from df9np with an vcxo and an adf4001 locked to the 10MHz ocxo disciplined via gps.

  • Hi,


    just for fun, here are a couple of videos of a standalone (no dish), modified Octagon Oslo PLL LNB. Referencing is from a Bodnar dual output secondary GPS reference with the first video of a KiwiSDR (binning equvalent to a wide CW filter) on the IF and the second with a Barlow Wadley XCR-30 (fairly wide ceramic SSB filter) on the IF.


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    Basic hardware block diagram and other info:


    https://73.fi/oh2aue/amsat_oh_…nlink_pll_lnb_kiwisdr.htm


    /Michael, oh2aue

    ---

    "If you have data, you have something, if you do not, you have nothing." (Bengt Hultqvist, SK 24.02.2019)

    Edited once, last by oh2aue: Cosmetics. ().

  • Hi all.


    I finally got round to testing the Octagon Oslo (originally 27 MHz reference) with a reference of 27.851400 MHz (Leo Bodnar Dual Output GPS Reference) to provide a direct IF output on 70cm. Highly empirical tests indicate that the front end/image reject mixer is working just as well as with the 739 MHz IF. Synthesizer locking and IF gain are still perfect. PLL & VCO locking is even OK all the way up to beyond 28 MHz and to make a pretty extreme test, I also tried a direct 2m IF, which worked, but already showing signs of instability issues (tuning range of VCO). Here is a short video of the Octagon LNB with 70 cm IF (receving with LNB only, no dish !!!):


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    /Michael, oh2aue

    ---

    "If you have data, you have something, if you do not, you have nothing." (Bengt Hultqvist, SK 24.02.2019)

  • DD0KP  DL5MGD  i2NDT


    OK, this morning the postman arrived bringing three samples of 'my' chip PL902190USY. It works .. in a sense that it generates 10 MHz from the Ublox 1 MHz clock. Since I made the phase detector with XOR's running at 1 MHz I used the 2nd part of the HC390 to divide the output of the jitter blocker by 10.


    The PLL locks and it seems that the jitter is gone. However, the phase noise is very high. When I listen to the CW-beacon it sounds like Aurora (!) So, it's difficult to detect whether the jitter is completely gone. Also, peculiarly, I have to tune ca 900 Hz higher ... This means that either the output of the Ublox is not exactly 1 MHz, or the jitter blocker generates a 10 MHz 'average signal' from the jittery Ublox 1 MHz.


    Now I have to find where this phase noise issue originates from. Is it intrinsic (i.e. the jitter blocker is not able to perfectly remove all jitter), the loop filter or something else?